Principal Silicon Verification Engineer - Bengaluru

About us  Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption.     As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies.  Job Summary  Working within the Silicon verification team, the silicon verification engineer is responsible for a wide range of tasks within the silicon verification team. This person is responsible for verification activities within Graphcore, helping the silicon team meet the company objectives for quality silicon delivery.   The Team  The verification team sits within the Silicon design team. We are responsible for ensuring that the RTL created by the logical design team and used by the physical design team matches the architecture specification for Graphcore silicon.   Responsibilities and Duties   Verification activities within the verification team  Ensuring good communication between sites  Verification planning, specification and closure of functional coverage  Providing feedback to architects  Test generation and failure diagnosis/triage  Contributing to shared verification infrastructure  Candidate Profile  Essential:   verification experience in relevant industry  Proven leadership and planning skills  Be highly motivated, a self starter, and a team player  Ability to work across teams and programming languages to find root causes of deep and complex issues  Ability to research along with the knowledge to solve complex problems  Presents technical and functional knowledge to design experiments/ projects that contribute to overall direction of team  Exercises independent judgment in developing methods, techniques and evaluation criteria for obtaining results  Highly influential on colleagues with ability to explain difficult concepts  Experience of the verification process applied in CPU and/or ASIC environments  System Verilog, Python, C++, Linux   12 – 14 years-experience in engineering background  Desirable  UVM  SVA  Assembly languages  LLVM, GCC  DVCS e.g. Git  SGE or other DRMS  XML and XPath/XSLT  Web programming – HTML/DOM, Javascript, SQL